Referring to FIG. 1, a block diagram of a chip 10 is shown. The chip 10 can include a number of diffused blocks 12. In one example, the diffused blocks 12 can be hard macros or random access memories (RAMs). The diffused blocks 12 can provide customized and/or optimized circuits for performing specific functions, for example, supporting high performance interface protocols, memory, etc.
Depending upon the application, the diffused blocks 12 can be used as part of a design for the chip 10 or left unused. According to conventional design rules, when the diffused blocks 12 are not used, the area occupied by the unused blocks is completely lost (i.e., the metal layers of the diffused block 12 are blocked). The conventional design solutions have disadvantages of (i) no routing through or over the unused diffused blocks, (ii) high congestion and cross-coupling effects over the unused diffused blocks, (iii) a large inventory because slices with and without diffused blocks can be required and (iv) huge databases result because the database contains complete views of all diffused blocks, even unused blocks.
It would be desirable to have a tool and/or method that facilitates reuse of resources of unused diffused blocks.